Architectures for Software Product Lines

Product line-based software development can only lead to full success if it is recognized as an integrated concept, which involves all phases of the software engineering process. This project concentrates on architecture modelling for SPLs.

We have developed a top-level process for SPL architecture modelling. Within the domain engineering initially the requirements for the entire PLP are collected together with the identified variability and afterwards compiled into a requirements model for the PLP, which among other things contains for example a feature model. This requirements model forms the basis for the top-level layer of the PLP architecture. Starting from this still abstract architecture layer, the PLP architecture gets more and more refined in further architecture layers. This procedure is according to the Model Driven Architecture (MDA) approach introduced by the OMG.

In the last step within the domain engineering the PLP architecture gets realized as far as possible. Thereby – according to the differentiation in common and variable components – both finished and incomplete components are placed in the PLP. At the beginning of the application engineering firstly the requirements for a concrete product are determined on base of the requirements for the PLP. Afterwards – similar to the domain engineering – a first coarse architecture layer for the product is developed, which is based on the layer of the same abstraction level as in the PLP architecture. In the following this top-level architecture becomes more and more refined and improved. Thereby the variability included in the PLP architecture is resolved conform to the previously identified product requirements. In the last step the executable system is implemented based on this product architecture.

At the moment we are analyzing which inputs from the requirements process must be given to build an architecture model for a SPL. Therefore different approaches for using feature modelling are analyzed how far they can serve as a basis for SPL architecture modelling and which inputs are missing.